Antenna Violation in VLSI Physical Design
1. What is an Antenna Violation?
An Antenna Violation occurs when a long interconnect accumulates excessive charge during the fabrication process, potentially damaging the thin gate oxide of transistors. This happens due to plasma etching, where metal layers act as antennas collecting charges.
Key Issue: If the accumulated charge discharges through a transistor gate, it can permanently damage the gate oxide, leading to chip failure.
2. Causes of Antenna Violations
🔹 Long metal interconnects connected to transistor gates collect excessive charge.
🔹 Higher metal layers have a larger area, leading to increased charge accumulation.
🔹 Insufficient diffusion path for charge dissipation.
🔹 Multiple vias connecting higher metal layers to the transistor gate.
3. Effects of Antenna Violations
❌ Gate oxide breakdown → Causes transistor failure.
❌ Permanent damage to circuits → Leads to yield loss.
❌ Chip reliability issues → Causes unpredictable behavior in silicon.
4. How to Fix Antenna Violations?
1. Use Antenna Diodes (Preferred Solution)
- Antenna diodes are placed near the transistor gates to provide a safe discharge path.
- These diodes allow excess charge to dissipate before reaching the transistor gate.
Example: Insert a reverse-biased diode near the affected transistor.
2. Metal Jumping (Routing Fix)
- Instead of routing directly from lower to higher metal layers, introduce an intermediate metal layer to distribute the charge.
- Helps in reducing charge accumulation on a single metal segment.
Example: Route from M1 → M2 → M3 instead of M1 → M3.
3. Increase Diffusion Connection
- Connect metal layers directly to diffusion (source/drain) instead of the gate.
- Allows charge to discharge safely through diffusion rather than damaging the gate.
4. Add Dummy Vias
- Instead of directly connecting a single via to the transistor gate, use multiple vias connected to diffusion or other structures to dissipate charge.
Example: Use an additional via to connect to ground or source.
5. Antenna Check in Physical Verification
- Antenna Rule Check (ARC) is performed as part of DRC checks in Physical Verification.
- Foundries define antenna ratio limits, which depend on metal layers and technology nodes.
- Typical Antenna Ratio Limits:
- M1: 400
- M2: 800
- M3+: 1000+
Tools Used for Antenna Checks
🔹 Calibre (Siemens/Mentor Graphics)
🔹 IC Validator (Synopsys)
🔹 PVS (Cadence)