Showing posts with label UPF Commands Used in Real-Time Projects. Show all posts
Showing posts with label UPF Commands Used in Real-Time Projects. Show all posts

UPF Commands

 

Common UPF Commands Used in Real-Time Projects

Unified Power Format (UPF) is essential for low-power design, allowing power intent specification separately from RTL. Below are key UPF commands used in real-world VLSI projects:


1️⃣ Power Domains Definition

🔹 Why? Defines separate power regions in the design.
🔹 Example: Two power domains: PD_CORE and PD_IO.

UPF Command Example:

create_power_domain PD_CORE -elements {u_core}
create_power_domain PD_IO -elements {u_io}

2️⃣ Power Supply Network

🔹 Why? Defines voltage sources and connections to power domains.
🔹 Example: VDD_CORE at 0.9V, VDD_IO at 1.8V.

UPF Command Example:

create_supply_net VDD_CORE
create_supply_port -direction in VDD_CORE
set_voltage VDD_CORE 0.9

create_supply_net VDD_IO
create_supply_port -direction in VDD_IO
set_voltage VDD_IO 1.8

3️⃣ Power Switch Definition

🔹 Why? Used for power gating to control power to a domain.
🔹 Example: Switch SW_CORE controls PD_CORE using VDD_CORE.

UPF Command Example:

create_power_switch SW_CORE -domain PD_CORE \
    -input_supply VDD_CORE -output_supply VSW_CORE \
    -control_port EN_SW

4️⃣ Isolation Strategy

🔹 Why? Prevents floating signals when one domain is OFF.
🔹 Example: PD_CORE needs isolation when PD_IO is ON.

UPF Command Example:

set_isolation ISOL_CORE \
    -domain PD_CORE \
    -clamp_value 0 \
    -isolation_signal ISO_EN -isolation_high

5️⃣ Level Shifter Definition

🔹 Why? Handles voltage mismatches between power domains.
🔹 Example: Connecting PD_CORE (0.9V) and PD_IO (1.8V).

UPF Command Example:

set_level_shifter LS_CORE_IO \
    -from PD_CORE -to PD_IO \
    -level_shifter_type down

6️⃣ Retention Strategy

🔹 Why? Saves state when power is OFF.
🔹 Example: Retains REG_CORE in PD_CORE using SAVE_EN.

UPF Command Example:

set_retention RET_CORE \
    -domain PD_CORE \
    -retention_signal SAVE_EN \
    -retention_supply VDD_CORE_RET

7️⃣ Power Intent Verification

🔹 Why? Validates UPF integrity in the design.
🔹 Example: Reports all power domains and connections.

UPF Command Example:

report_power_domains
report_isolation
report_level_shifters
report_retention

8️⃣ Binding UPF to RTL

🔹 Why? Connects UPF with the RTL for synthesis & verification.

UPF Command Example:

read_upf top_design.upf
read_verilog top_design.v
link_design

Conclusion

🔹 UPF commands ensure power-aware design implementation by defining:
Power domains (create_power_domain)
Voltage sources (create_supply_net)
Power switches (create_power_switch)
Isolation and level shifters (set_isolation, set_level_shifter)
State retention (set_retention)